(1) Field
The disclosed methods and systems relate generally to semiconductor processing, and more particularly to wafer handling methods and systems utilizing a wafer platen having an electrostatic clamp for plasma doping processes.
(2) Description of Relevant Art
In previous approaches, various methods and materials have been tested in order to provide a good electrical contact between the wafer and the platen, such as utilizing flat metal platens (e.g. Aluminum), spring-loaded sharp/flat pins (e.g. Tungsten, graphite, aluminum), aluminum foil, etc. However, previous approaches have relied on the gravitational force of the wafer which has not provided enough force for penetrating the oxide layer on the wafer. Therefore, problems have arisen such as poor electrical contact between the metal platen and the wafer; poor secondary ion mass spectrometry (SIMS) as-implanted junction depth repeatability; wafer charging damage; micro-discharge between the wafer and the platen; wafer backside particle generation; and excessive wafer temperature increase.
For instance, in prior art systems disclosed in U.S. Patent Publication Nos. 2001/0016302 and 2002/0067585, wafer cooling schemes use an electrostatic chuck. However, these systems fail to address the problems relating to the electrical contact to the wafer and high voltage wafer biasing during backside gas cooling.
In other prior art systems, techniques of residual charge removal for unclamping after processing the wafers are disclosed in U.S. Pat. Nos. 5,117,121; 6,033,482; and 6,567,257 and U.S. Patent Publication No. 2003/0030961. However, each of these systems are problematic due to the fact that complicated circuitry and control systems are required or contamination issues arise due to the use of radiation sources or the like.
The use of partially implanted insulating surfaces to provide both electrical contact and a larger area of thermal contact for wafer cooling purposes is disclosed in U.S. Pat. No. 6,552,892. However, the cooling efficiency is low in the vacuum environment and the insulating surfaces described above typically have relatively low melting temperatures and low chemical resistance which limits its applications. In yet other prior art systems directed to RF applications, such as U.S. Pat. Nos. 6,529,362 and 6,033,482, electrical contact is not required during processing due to the RF driven self-bias effect.
Accordingly, there is a need for improved wafer handling systems utilizing a wafer platen having an electrostatic clamp for improving the electrical contact between the platen and the wafer to increase the wafer cooling capability, suppress the wafer backside discharge and reduce wafer backside particle generation.